专利名称:Testable Electronic Circuit发明人:Herve Fleury,Jean-Marc Yannou申请号:US11815313申请日:20060131
公开号:US20080133167A1公开日:20080605
专利附图:
摘要:An electronic circuit contains groups of flip-flops (-), coupled to data terminals(-) of the circuit and to a functional circuit (). Each group (-) has a clock input for clockingthe flip-flops of the group. Each group (-) can be switched between a shift configurationand a functional configuration, for serially shifting in test data from the data terminals
and to function in parallel to supply signals to the functional circuit () and/or receivesignals from the functional circuit () respectively. A test control circuit () can be switchedbetween a functional mode, a test shift mode and a test normal mode. The test controlcircuit () is coupled to the groups of flip-flops (-) to switch the groups to the functionalconfiguration in the functional mode and to the shift configuration in the test shift mode.A clock multiplexing circuit (-) has inputs coupled to the data terminals (-) and outputscoupled to clock inputs of the groups (-). The test control circuit () is coupled to controlthe clock multiplexing circuit (-) dependent on the mode assumed by the test controlcircuit (). The clock multiplexing circuit (-) is arranged to substitute clock signals fromrespective ones of the data terminals (-) temporarily at the clock inputs of respectiveones of the groups (-) in the test normal mode.
申请人:Herve Fleury,Jean-Marc Yannou
地址:Caen FR,Colomby Sur Thaon FR
国籍:FR,FR
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