BUILT-IN SELF TEST FOR SYSTEM IN PACKAGE

专利名称：BUILT-IN SELF TEST FOR SYSTEM IN

PACKAGE

发明人：Wang-Jin Chen,Aviles Chang申请号：US11306773申请日：20060111

公开号：US20070159201A1公开日：20070712

专利附图：

摘要：A SIP (system in package) with a chip and a memory mode, capable ofperforming integration test on the memory module even if the memory module doesnot include any scan chain is provided. The chip has a built-in self-test (BIST) circuit, which

generates test pattern signals to test the memory module in response to a mode signal.Under a test mode, after the memory module receives the test pattern signals, thememory module outputs responsive readout signals to the BIST circuit and the BISTcircuit determines and outputs a test result and a test record in response to the readoutsignals. If the test fails, conditions of the faulty memory module are recognized from thetest record.

申请人：Wang-Jin Chen,Aviles Chang

地址：Kaohsiung County 830 TW,Hsinchu County 310 TW

国籍：TW,TW

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